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作 者:Masaharu Yamaji Keisei Abe Akihiro Jonishi Hidenori Takahashi Hitoshi Sumida
机构地区:[1]Fuji Electric Co. Ltd., Matsumoto, Nagano 390-0821, Japan
出 处:《Journal of Energy and Power Engineering》2012年第9期1515-1520,共6页能源与动力工程(美国大卫英文)
摘 要:A novel level-shift LDMOS (lateral double-diffused metal oxide semiconductor) structure with the HV (high voltage) -interconnection for a 600 V-HVIC (high voltage integrated circuit) on thick SOI (silicon on insulator) is proposed. There are two original points in the proposed structure. One is the formation of the double floating p-layers under the HV-interconnection to prevent potential distribution in the drift from disturbing due to the HV-interconnection, and the other is a good combination between the LDMOS structure and multiple trench isolation to obtain the isolation performance over 600 V. From the proposed structure, the high blocking capability of the LDMOS, including both off- and on-breakdown voltages over 600 V and high hot carrier instability, and the isolation performance over 1,200 V can be obtained successfully. This paper will show numerical and experimental results in detail.
关 键 词:HVIC SOL level-shift LDMOS HV-interconnection.
分 类 号:TN929.533[电子电信—通信与信息系统] TN386.1[电子电信—信息与通信工程]
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