基于SATAⅡ协议的CRC32并行算法的研究  

Research on CRC32 parallel algorithm based on SATAⅡprotocol

作　　者：朱佳齐[1] 尹蕾[1] 许晏[1] 陈泉根[1] 

机构地区：[1]中国工程物理研究院电子工程研究所,四川绵阳621900

出　　处：《电子设计工程》2012年第20期43-45,共3页Electronic Design Engineering

摘　　要：在介绍CRC校验原理和传统CRC32串行比特算法的基础上,由串行比特型算法推导出一种CRC32并行算法。并结合SATAⅡ协议的要求,完成了SATAⅡ主控制器设计中CRC生成与校验模块的设计。最后通过在ISE平台上编写Verilog硬件描述语言,对SATA协议中帧结构数据进行仿真,验证该CRC32并行算法能够满足SATA接口实时处理的要求。A CRC32 parallel algorithm based on the basic principles of the CRC checksum and the traditional serial bit calculation is introduced in this paper.The CRC32 generation and detection module in the design of SATAⅡhost controller is designed by combining the requirement of the SATA protocol.The simulating results of the data from the frame structure of SATA protocol through the ISE platform and verilog show that the proposed algorithm can efficiently meet the SATA real-time processing requirements.

关 键 词：CRC32 并行算法 SATA VERILOG 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]