基于衬底偏压电场调制的高压器件新结构及耐压模型  

A New Structure of High-Voltage LDMOS Device Based on Modulation of Electric Field by Substrate Bias

作　　者：李琦[1] 唐宁[1] 王卫东[1] 李海鸥[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《北京理工大学学报》2012年第12期1279-1282,1287,共5页Transactions of Beijing Institute of Technology

基　　金：广西自然科学基金资助项目(2010GXNSFB013054);广西省重大科技攻关工程资助项目(11107001-20)

摘　　要：提出一种基于衬底偏压电场调制的薄层硅基LDMOS高压器件新结构,称为SB LDMOS.通过在高阻P型衬底背面注入N^+薄层,衬底反偏电压的电场调制作用重新分配体内电场,纵向漏端电压由源端和漏端下两个衬底PN结分担,器件的击穿特性显著改善.求解漂移区电势的二维Poisson方程,获得表面电场和击穿电压的解析式,研究器件结构参数对表面电场和击穿电压的影响.仿真结果表明,与埋层LDMOS相比,SB LDMOS击穿电压提高63%.A novel thin drift region device is proposed based on the electric field modulation in the substrate with thin epitaxial layer, which is called SB LDMOS （LDMOS with substrate bias）. The SB LDMOS is characterized by infusing N＋ layer into the back of P type substrate to improve the breakdown voltage of the device. The mechanism of improving breakdown voltage could be considered that the high electric field under the drain is reduced by positive substrate bias, which causes the re-distribution of the bulk electric field in the drift region and the drain voltage is sustained by two PN junctions under the drain and the source. By solving 2-D Poisson＇s equation of potential in the drift region, the analytical solutions of breakdown voltage and surface electric field are obtained, from which the optimal relation between structure parameters could also be fixed. Numerical results indicate that the breakdown voltage of proposed device is increased by 63 % in comparison to the LDMOS with P buried layer.

关 键 词：衬底偏压 电场调制 击穿电压 耐压模型 

分 类 号：TN432[电子电信—微电子学与固体电子学]