指令级并行编译器的数据预取及优化方法  

A Data Prefetching Method Used in ILP Compilers and Its Optimization

作　　者：连瑞琦[1] 张兆庆[1] 乔如良[1] 

机构地区：[1]中国科学院计算技术研究所,北京100080

出　　处：《计算机学报》2000年第6期576-584,共9页Chinese Journal of Computers

摘　　要：微处理器芯片的处理能力越来越强 .但是 ,存储器的速度却远远不能与其匹配 ,造成了整个系统的性能不理想 .为解决这个问题 ,编译器发展了局部性优化、数据预取等多种技术 .文中将介绍一种用于 IL P(Instructionlevel Parallelism)优化编译器的数据预取技术以及一种利用寄存器堆减少主存访问次数、对程序进行优化的方法 .利用它们可以提高平均存储性能 。With the development of instruction level parallelism (ILP) technology, the processing capability of microprocessor has been increasing dramatically. Unfortunately, the speed of the whole system has not kept pace because of the imperfect speed of memory. To improve the performance of memory, locality optimization and data prefetching are developed. This paper introduces an approach of data prefetching used in ILP compiler and a method to optimize the memory system by decreasing the frequency of accessing memory. The scheme can improve the average performance of memory, especially for the science and engineering application.

关 键 词：数据预取 寄存器堆 预取优化 指令级并行编译器 

分 类 号：TP311[自动化与计算机技术—计算机软件与理论]