高温氩退火对提高Si片质量的研究  被引量:1

Study on Quality Improvement of Silicon Wafer by High Temperature Argon Annealing

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作  者:李宗峰[1] 冯泉林[1] 赵而敬[1] 盛方毓[1] 王磊[1] 李青保[1] 

机构地区:[1]北京有色金属研究总院有研半导体材料股份有限公司,北京100088

出  处:《半导体技术》2013年第4期302-305,共4页Semiconductor Technology

基  金:国家科技重大专项资助项目(2008ZX02401;2009ZX02011)

摘  要:首先研究了氩退火对大直径直拉Si单晶表面的空洞型微缺陷的影响。样品在1 200℃下进行退火,退火前后样品上的晶体原生粒子缺陷(COP)利用激光计数器SP1来观察。试验表明Si片经过1 h退火后,表面的COP全部被消除;另外,对样品退火前后的几何参数和金属含量也做了测试,发现样品的几何参数和金属含量都没有明显的变化;最后研究了高温退火对MOS电容栅氧化层性能的影响,结果表明退火前后的样品分别制备为MOS电容,利用斜坡电压法来测试其击穿电压。实验发现,Si片经过1 200℃热处理后,MOS电容的击穿电压有了明显的提高,这表明高温退火工艺能够有效提高栅氧化层的性能。The effect of argon annealing on the surface-region voids in large diameter czochralski silicon was investigated first. After argon annealing at the temperature of 1 200 ℃, the crystal originated particles (COP) relative to voids were observed by the laser particle counter SPI. It was found that COP on the wafer surface region was annihilated completely after annealing for 1 h. Besides, the geometric parameters and metal contamination of as-grown and annealed wafers were also tested, respectively. The result shows there is no distinctly change in both of them. The effects of the high temperature annealing on the GOI of MOS devices was investigated at last. The MOS device was prepared by polished wafers and annealed wafers, respectively. Then using a ramp voltage method ( V - ramp) to test its breakdown voltage. It is found that the breakdawn voltage of the MOS device prepared by wafers annealed for 1 h at 1 200 ℃ in argon ambient can be well improved which is related to a significant reduction of near-surface crystal defects as compared with non-annealed polished wafers.

关 键 词:高温氩退火 空洞型微缺陷 栅氧化层完整性 直拉单晶硅 晶体原生粒子缺陷 

分 类 号:TN304.12[电子电信—物理电子学]

 

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