一种降低RAM测试复杂性的新方法  

A NEW METHOD TO REDUCE THE RAM TEST COMPLEXITY

作　　者：朱恒静[1] 

机构地区：[1]航天511所可靠性中心

出　　处：《国外电子测量技术》2000年第5期16-20,25,共6页Foreign Electronic Measurement Technology

摘　　要：本文给出了一种 I_(DDQ)测试技术和传统的走步测试相结合的 RAM测试方法。采用 I_(DDQ)测试技术可以减少 RAM测试的成本,但由于 RAM结构和使用上的限制,只采用 I_(DDQ)测试其故障检测能力不够高。在常规 RAM测试的基础上增加 I_(DDQ)测试是一个很好的解决方案。RAM阵列中的桥接故障、栅氧短路故障,可以用 I_(DDQ)覆盖。I_(DDQ)测试与走步测试相结合可以测试开路、数据滞留等不能仅仅由 I_(DDQ)技术测试的故障。对于一个给定的 SRAM故障模型,此方法可以减少测试的复杂性,测试复杂程度从16n(n为 RAM的地址数)减少到 5n+4。This article outlines a RAM test methodology taking into account IDDQ and voltage based March tests. RAM test cost forms a significantly large portion of its total production cost. IDDQ testing can be utilized to reduce this cost. However,owing to architectural and operational constraints of RAMs,a straight forward application of IDDQ testing has very limited defect detection capability. The IDDQ test is then supplemented with voltage based March test to detect the defects (opens,data retention) that are not detectable using IDDQ technique. The combined test methodology reduces the algorithmic test complex for a given SRAM fault model from 16n to 5n + 4 IDDQ measurements.

关 键 词：故障模型 IDDQ测试 测试复杂性 RAM 

分 类 号：TP333.806[自动化与计算机技术—计算机系统结构]