功率快恢复二极管反偏ESD机理分析  

Mechanism Analysis on Reverse Biased ESD of Power Fast Recovery Diodes

作　　者：魏峰[1] 吴郁[1] 周新田[1] 周东海[1] 吴立成[1] 贾云鹏[1] 胡冬青[1] 金锐 刘钺杨 

机构地区：[1]北京工业大学电子信息与控制工程学院,北京100124 [2]国网智能院电工新材料及微电子研究所,北京100192

出　　处：《半导体技术》2013年第8期629-634,共6页Semiconductor Technology

基　　金：国家自然科学基金资助项目(61176071);教育部博士点基金新教师项目(2011110312001);国家电网公司科技项目(SGRI-WD-71-13-006)

摘　　要：功率半导体器件静电放电(ESD)的可靠性在应用中至关重要,其抗ESD的机理需深入研究。采用一种符合GB/T 17626.2标准的简明分段线性电流源,对功率快恢复二极管(FRD)反偏ESD过程进行仿真计算。基于器件外端电压波形经历过冲、负阻和振荡以及平缓发展三个阶段,分析了器件内部相应的一系列复杂变化。结果表明:器件内部的"过耗尽"、雪崩注入、载流子及电场分布涨落等变化,最终导致电流在pn结拐角处形成局部集中。最后,分析了器件结构参数对抗ESD能力的影响。Electrostatic discharge （ESD） reliability plays a crucial role in the application of power semiconductor device, so it is important to research the mechanism of ESD immunity. A simple piecewiselinear current-source method fulfilled the national standard GB/T 17626. 2 was proposed and used in the simulation of reverse biased ESD process of power fast recovery diodes. A sequence of complex evolution was discussed in the inner device during three stages of the terminal voltage waveform, including over-shoot, negative differential resistance in oscillation and stably developing. The results show that the local current crowds in the corner of pn junction due to the complex evolution such as over-depletion, avalanche injection, the fluctuation of carriers and electric field distribution, etc. Finally, the impacts of device structure parameters on the ESD immunity are investigated.

关 键 词：静电放电(ESD) 快恢复二极管(FRD) 人体模型(HBM) 雪崩注入 临界场 强 背景掺杂 

分 类 号：TN306[电子电信—物理电子学] TN31