内存测试方法的研究和实现  

Research and implementation of Memory test methods

作　　者：赵雪莲[1] 杜宇[1] 

机构地区：[1]北京自动测试技术研究所,北京100088

出　　处：《国外电子测量技术》2013年第9期46-51,共6页Foreign Electronic Measurement Technology

摘　　要：本文主要讲述内存芯片的测试方法,并在国产集成电路测试系统上完成测试。通过硬件算法图形产生器模块弥补自动测试系统数字通道图形深度不足的问题,该模块具有24位独立地址输出,具有地址装载、保持、加一和减一等功能。采用新March算法,增加多种故障模型,优化编写图形向量,减少其图形深度,提高其故障覆盖率。不仅能加快内存芯片测试的速率,还能保证功能测试的故障覆盖率,对我国内存芯片的测试产生积极的影响。This paper focuses on the memory chip testing methods,and in the domestic IC test system to complete the test.Graph algorithms generated by the hardware modules make up the digital channel graphics depth automatic test system the problem of insufficient,the module has 24 independent address output,with address loading,hold,plus one and minus one feature.Adoption of the new march algorithm,increase the variety of fault models,optimization prepared graphics vector,reduce its graphical depth,improve its fault coverage.Not only can accelerate the rate of the memory chip testing,but also to ensure functional test fault coverage,testing of memory chips to China have a positive impact.

关 键 词：算法图形产生器 测试向量 自动测试系统 MARCH算法 

分 类 号：TP9[自动化与计算机技术]