基于SRAM的软硬件协同转置存储器设计与实现  

Design and Implementation of Matrix Transpose Controller Using HW/SW Co-Design Based on SRAM

作　　者：郑艳丽[1,2] 李丽[1,2] 潘红兵[1,2] 李伟[1,2] 沙金[1,2] 

机构地区：[1]南京大学微电子设计研究所,南京210093 [2]江苏省光电信息功能材料重点实验室,南京210093

出　　处：《微电子学》2013年第6期797-801,共5页Microelectronics

基　　金：国家自然科学基金资助项目(61176024;60876017);江苏高校优势学科建设工程资助项目

摘　　要：转置存储是信号处理中常见的算法,矩阵转置的效率对整个算法(如实时成像算法)的性能有着重要影响。在研究各种矩阵转置方法的基础上,提出了一种基于SRAM的软硬件协同转置存储控制器,利用嵌入式处理器进行控制,具有很好的灵活性与可扩展性,能根据矩阵的不同尺寸选择正确的转置方法。该转置存储控制器采用SRAM作为存储器,使用DMA等外围设备,具有很高的数据输入输出速率。该设计已嵌入到一款异构众核片上网络(NoC)系统,并基于Xillinx V6FPGA芯片,实现了原型演示系统。Matrix transpose is a common algorithm in signal processing system. The efficiency of matrix transpose has a great effect on performance of the whole algorithm. A variety of matrix transpose methods was studied, and a matrix transpose controller using HW/SW co-design based on SRAM was presented, which was extensible and more flexible, as it was controlled by embedded processor, and it could correctly choose which method to use according to the size of matrix. With SRAM as memory and using many peripheral units, such as DMA, the controller could input and output data packets at very high speed. This unit was embedded into a heterogeneous multi-core NoC system, and its prototype demo system was implemented on Xillinx V6 FPGA chip.

关 键 词：矩阵转置 信号处理 静态随机存取存储器 软硬件协同 

分 类 号：TN402[电子电信—微电子学与固体电子学]