基于量子元胞自动机的模可变计数器设计  

Design of the Modulus Alterable Counter Based on the Quantum-Dot Cellular Automata

作　　者：崔焕卿[1] 蔡理[1] 张明亮[1] 杨晓阔[1] 陈祥叶[1] 汪志春[1] 

机构地区：[1]空军工程大学理学院,西安710051

出　　处：《微纳电子技术》2014年第1期12-16,共5页Micronanoelectronic Technology

基　　金：国家自然科学基金资助项目(61172043);陕西省自然科学基础研究计划重点项目(20HJZ015)

摘　　要：模可变计数器是一种功能丰富、灵活性很强的时序逻辑电路。基于一种二维纳米尺度计算范例量子元胞自动机(QCA)设计了一种2位模可变计数器单元电路,该计数器由2个JK触发器和5个基本逻辑门构成。采用置零模式设置了计数器的初始状态,该方法为解决QCA时序逻辑电路设计中输出端随机初始状态的消除问题提供了一条有效途径。在QCA版图设计过程中,通过延迟匹配规则完成了反馈回路的时钟布线。QCADesigner软件仿真结果表明,设计的计数器具有正确的逻辑功能,当两位模式控制信号M2M1为01,10和11时,分别实现了模2、模3和模4计数。Modulus alterable counter is a sequential logic circuit, which has abundant function and strong flexibility. A 2-bit modulus alterable counter unit circuit was designed based on the quan- tum-dot cellular automata （QCA） with two-dimensional computing paradigm in nanometer scale. The proposed counter was composed of two JK flip-flops and five basic logic gates. The initial state of the counter was established by a zero mode. This method provides an effective way to solve the problem of the random initial states elimination of the output cell during the design of the sequential logic circuit in QCA. The clock wiring of feedback loop was finished by the delay matching rule in the process of QCA layout design. The simulation results of the QCADesigner software show that the proposed counter has correct logic function. When the two bits mode con- trol signals M2M1 are 01, 10 and 11, the modulus-2 count, modulus-3 count and modulus-4 count are realized, respectively.

关 键 词：量子元胞自动机(QCA) 计数器 模可变 时钟布线 随机初始状态 

分 类 号：O471.1[理学—半导体物理] TN4[理学—物理]