基于ARM与CPLD的可驯频率基准的设计与实现  

Design and realization of disciplined frequency reference based on ARM and CPLD

作　　者：杨剑青[1,2,3] 杨晓琴[4] 谢亮 芦旭 樊战友 

机构地区：[1]国家授时中心,西安710600 [2]中国科学院精密导航定位与定时技术重点实验室,西安710600 [3]中国科学院研究生院,北京100039 [4]西北农林科技大学,杨凌712100

出　　处：《电子测量技术》2014年第2期75-77,共3页Electronic Measurement Technology

摘　　要：介绍了一种基于ARM与CPLD的可驯频率基准的软硬件设计方法,在ARM的控制下采用数字PID控制算法产生晶振控制电压,根据所测量的频率值与标称的频率值之间的差值大小来调整对应电压控制字的步进幅度,进而达到快速对本地晶振驯服的目的,从实验结果来看,驯服后的晶振准确度较无驯服前提高约一个数量级,满足设计要求。This paper represents a hardware and software design method of tamable frequency standard on the basis of ARM and CPLD platform.Under the control of ARM and by using the digital PID control algorithm,crystal vibration control voltage is produced,and then the size of step of corresponding voltage control bit is adjusted according to the frequency difference between the measurements and the nominal value,which aims at achieving fast tamable local crystal oscillator.The experiment results show that the accuracy of the frequency reference is improved by one order of magnitude after the crystal oscillator is being tamed,which meets the design requirements.

关 键 词：可驯频率基准 准确度 ARM CPLD PID 

分 类 号：TN742[电子电信—电路与系统]