CMOS器件SEL效应电路级防护设计及试验验证  被引量:3

Mitigation Technique and Experimental Verification of Single Event Latch-up Effect in Circuit Level for CMOS Device

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作  者:陈睿[1,2] 冯颖[3] 余永涛[1,2] 上官士鹏[1] 封国强[1] 朱翔[1] 马英起[1] 韩建伟[1] 

机构地区:[1]中国科学院国家空间科学中心,北京100190 [2]中国科学院大学,北京100049 [3]北京电子工程总体研究所,北京100854

出  处:《原子能科学技术》2014年第4期721-726,共6页Atomic Energy Science and Technology

基  金:国家自然科学基金资助项目(40974113);基础科研项目资助(A1320110028);中国科学院支撑技术项目资助(110161501038);中国科学院知识创新工程青年基金资助项目(O82111A17S)

摘  要:利用脉冲激光单粒子效应试验装置,开展了两种CMOS SRAM器件IDT71V416S和K6R4016V1D单粒子闭锁(SEL)效应的研究。基于CMOS电路结构SEL效应的机理及触发条件,分析两种CMOS器件的闩锁响应特性,设计了两种CMOS器件SEL效应防护电路,并探讨了两种防护电路的适用范围及限流电阻、恒流源电流的选取。利用脉冲激光和重离子辐照试验验证了两种防护方法的防护效果。结果表明,当器件工作电流和闩锁维持电流相差不大时,加入限流电阻虽能降低闩锁电流幅值,但电路不能自动退出闩锁状态。恒流源限流防护电路不但降低了SEL电流的幅值,而且自动退出闩锁状态,能更有效地减缓CMOS器件电路级闩锁效应。By using the pulsed laser single effect facility,the single event latch-up(SEL)effect experiments of two types of CMOS devices were studied.Based on the trigger mechanism of SEL effect in CMOS circuit,both two protection circuits of SEL effect and their hardness assurance mechanisms were discussed,as well as application scopes.The roles of two types of SEL mitigation circuits were verified with pulsed laser and heavy ions facilities.The results show that the current limiting resistance can effectively reduce the amplitude of the SEL current,but the circuit can not quit the stateof the latch-up automatically,as the operation current of device is similar with latch-up holding current of device.The constant current source current-limiting mitigation circuit not only reduces the amplitude of the current SEL,but also quits the state of the latchup automatically.It is a more effective mitigation technique of SEL effect in CMOS circuit.

关 键 词:CMOS器件 单粒子闭锁效应 防护电路 脉冲激光 

分 类 号:TN432[电子电信—微电子学与固体电子学]

 

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