通孔内镀金工艺研究  

Research on the Process of Via Gold Electroplating

作　　者：刘相伍 王川宝[1] 崔玉兴[1] 付兴昌[1] 

机构地区：[1]中国电子科技集团公司第十三研究所,石家庄050051

出　　处：《半导体技术》2014年第6期438-441,共4页Semiconductor Technology

摘　　要：针对化合物半导体芯片通孔内镀金层薄导致通孔接地电阻大的问题,优化了喷液电镀台和挂镀电镀台的通孔镀金工艺条件,研究了两者在电镀过程中的镀液流场的差异,分析了两种电镀方式的工艺结果有显著差异的原因。喷液电镀台最佳工艺条件:直流电镀,电流积为15 A·min,电流密度为0.4 A/dm2,镀液体积流量为20 L/min时,对深宽比约为2∶1的通孔样品进行电镀,得到孔内外镀层厚度比接近1∶1的良好电镀效果。实验结果表明:喷液电镀台在晶圆通孔电镀方面有较大优势,可在不增加背面镀金厚度的情况下增加通孔内镀层厚度,不仅解决了芯片通孔内镀金层薄的问题,而且有利于降低成本,是今后通孔电镀工艺发展的方向之一。To deal with the high grounding resistance leading by the low thickness of the gold in viain the compound semiconductor devices, the via electroplating process of spraying electroplater and rackelectroplater was developed. The differences of the bath flowing between the two kinds of electroplaterswere researched, and the reason for the significant different results between the two kind of electroplaterswas analyzed. The optimum process conditions are obtained as following： the direct current plating, thecurrent accumulation is 15 A ~ rain, the current density is 0.4 A/dm2, the bath flowing rate is20 L/rain using spraying electroplater. When the ratio between the diameter and the depth of via is about2 ： 1, the thicknesses of the gold in and outside of via are almost equal. The results shows that the spra-ying electroplater has great advantage of wafer via plating, and the thickness of the gold in via can be in-creased remarkably at the condition that the gold outside of via increases little. By using the spraying e-lectroplating, the cost can be reduced, the production efficiency can be improved. Spraying electropla-ting is one of the development direction for the backside electroplating of the high power chips.

关 键 词：大功率芯片 通孔 背面镀金 喷液电镀 通孔电阻 

分 类 号：TN305[电子电信—物理电子学]