高速光纤通信用定时恢复判决电路  

High-speed clock recovery and decision circuit applied to optical fiber communication

在线阅读下载全文

作  者:詹琰[1] 王永生[1] 赵建龙[1] 夏冠群[1] 孙晓玮 范恒[1] 

机构地区:[1]中国科学院上海冶金研究所,上海200050

出  处:《功能材料与器件学报》2001年第1期95-97,共3页Journal of Functional Materials and Devices

摘  要:对光纤通信用定时恢复判决电路进行了研究 ,设计了由 1μ m耗尽型 GaAs金属-半导体势 垒场效应晶体管 (MESFET)器件构成的判决电路和时钟提取电路。判决电路的基本单元为源耦合 场效应晶体管逻辑 (SCFL)电路 ,时钟提取电路由预处理器和锁相环构成。模拟分析表明 ,时钟提 取电路可从输入信号中提取判决电路所需的时钟脉冲 ,频率达 2.5GHz,判决电路可对输入信号进 行正确的" 0"、" 1"判决 ,并经时钟抽样后 ,输出正确的数字信号 ,传输速率达 2.5Gbit/s。实测电路 可正确判决 ,时钟抽样后 ,输出正确的数字信号 ,传输速率达 2.5Gbit/s。Clock recovery and decision circuit applied to optical fiber communication is investigated. GaAs decision circuit and clock recovery circuit fabricated with depletion-mode GaAs metal-semi- conductor field-effect transistors (MESFET's) has been designed. The base circuit cell of the de- cision circuit is source-coupled field-effect transistor logic (SCFL) circuit. The clock recovery cir- cuit contains a preprocessor and a phase-locked loop (PLL). It is proved by simulation analysis that the clock recovery circuit can recover 2.5GHz clock signal from the input and the 2.5Gbit/s decision circuit can deal with input signal rightly and produce correct digital output signal after being sampled by recovered clock. It is proved by test that the 2.5Gbit/s circuit can deal with input signal and produce output signal rightly after being sampled by recovered clock.

关 键 词:GAAS MESFET 判决电路 时钟提取电路 高速光纤通信 

分 类 号:TN929.11[电子电信—通信与信息系统] TN386.3[电子电信—信息与通信工程]

 

参考文献:

正在载入数据...

 

二级参考文献:

正在载入数据...

 

耦合文献:

正在载入数据...

 

引证文献:

正在载入数据...

 

二级引证文献:

正在载入数据...

 

同被引文献:

正在载入数据...

 

相关期刊文献:

正在载入数据...

相关的主题
相关的作者对象
相关的机构对象