基于ARM和FPGA的1553B总线设备检测系统的设计  

Design of a detection system for 1553B bus devices based on ARM and FPGA

作　　者：王占领[1] 张登福[1] 李云杰[1] 

机构地区：[1]空军工程大学航空航天工程学院,陕西西安710038

出　　处：《计算机工程与科学》2014年第6期1005-1010,共6页Computer Engineering & Science

基　　金：国家自然科学基金资助项目(61175029;61203268);国防科技重点实验室基金资助项目(9140C610301080C6106;9140C6001070801);航空科学基金资助项目(20101996009)

摘　　要：1553B总线在军事领域应用非常广泛,目前针对1553B总线设备的检测系统并不能完全满足实际应用需求。为使计算机与1553B总线设备的数据通信更加方便,提高总线设备检测效率,基于ARM和FPGA设计了一种1553B总线设备检测系统。首先给出了系统的总体设计框架,详细介绍了硬件设计和软件设计方法。设计时采用了模块化的方法,对ARM模块、FPGA模块及接口连接部分进行分别设计。ARM模块实现了USB和以太网双接口。用FPGA设计1553B协议IP核采用自顶向下的方法。同时,也对外围电路和电源模块进行了优化设计。完成设计后进行了仿真验证,结果表明设计实现了接收与发送功能,符合设计要求。最后,在电路板上进行了实际调试,测试取得了良好的效果,能够满足实际应用要求。1553B bus is extensively used in the military field,but the detection equipments for 1553B bus devices cannot meet the actual demands absolutely.In order to facilitate the data communication between computers and 1553B bus devices and improve the detection efficiency of 1553B bus devices,a detection system for 1553B bus devices is designed based on ARM and FPGA.The integrated design idea of the system is given firstly,and the hardware and software design methods are introduced in detail.By using the modular method,the ARM module,the FPGA module and the interface are designed independently.The ARM module implements the USB and Ethernet interfaces.By using the top-down method,the 1553B protocol IP core is implemented on FPGA.Besides,the peripheral circuits and the power module are optimized.Simulation and verification are carried out.The results indicate that the receive and send functions are designed and conform to the design specification.Finally,the practical testing on the hardware platform achieves effective results,proving that our design can meet the actual demands.

关 键 词：ARM FPGA 1553B总线 IP核 检测系统 

分 类 号：TP336[自动化与计算机技术—计算机系统结构]