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作 者:许晓燕[1] 谭静荣[1] 高文钰[1] 黄如[1] 田大宇[1] 张兴[1]
出 处:《电子学报》2002年第2期269-270,共2页Acta Electronica Sinica
基 金:国家自然科学基金 (No .699760 0 1 ) ;国家重点基础研究专项基金 (No .2 0 0 0 0 365)
摘 要:用LOCOS工艺制备出栅介质厚度为 3 4nm的MOS电容样品 ,通过对样品进行I V特性和恒流应力下V t特性的测试 ,分析用氮气稀释氧化法制备的栅介质的性能 ,同时考察了硼扩散对栅介质性能的影响 .实验结果表明 ,制备出的 3 4nmSiO2 栅介质的平均击穿场强为 16 7MV/cm ,在恒流应力下发生软击穿 ,平均击穿电荷为 2 7C/cm2 .栅介质厚度相同的情况下 ,P+ 栅样品的击穿场强和软击穿电荷都低于N+MOS capacitors with 3 4nm gate oxide layer were manufactured in this experiment.By measuring current voltage characteristic and evolution of the gate voltage during constant current stress of the capacitors,the electrical characteristics of the gate oxide have been studied.In addition,the effect of boron penetration on gate oxide was investigated.The experimental results showed that the average breakdown field of the 3 4nm gate oxide was 16 7MV/cm.Under constant current stress,soft breakdown occured and the average charge to breakdown was 2 7C/cm 2.For p + polysilicon gate MOS capacitor,breakdown field and charge to breakdown of gate oxide were all decreased because of boron penetration.
分 类 号:TN304.21[电子电信—物理电子学]
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