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作 者:张姚[1] 易茂祥[1] 王可可 吴清焐 丁力[1] 梁华国[1] ZHANG Yao;YI Maoxiang;WANG Keke;WU Qingwu;DING Li;LIANG Huaguo(School of Electronic Science and Applied Physics,He f ei University of Technology,He f ei 230009,P.R.China)
机构地区:[1]合肥工业大学电子科学与应用物理学院,合肥230009
出 处:《微电子学》2018年第6期839-845,共7页Microelectronics
基 金:国家自然科学基金面上项目(61371025;61674048)
摘 要:目前,多阈值电压方法是缓解电路泄漏功耗的有效手段之一。但是,该方法会加重负偏置温度不稳定性(NBTI)效应,导致老化效应加剧,引起时序违规。通过找到电路的潜在关键路径集合,运用协同优化算法,将关键路径集合上的门替换为低阈值电压类型,实现了一种考虑功耗约束的多阈值电压方法。基于45nm工艺模型及ISCAS85基准电路的仿真结果表明,在一定功耗约束下,该方法的时延改善率最高可达12.97%,明显优于常规多阈值电压方法。电路的规模越大,抗泄漏功耗的效果越好。The multi-threshold voltage method is an effective way to alleviate the circuit leakage power consumption today.However,the influence of negative bias temperature instability (NBTI)on the circuit was aggravated with the multi-threshold voltage method.NBTI will exacerbate the aging effect and lead to timing violation.According to the preset timing margin,the potential critical paths could be found and the gates in these paths could be replaced with the low threshold voltage type through the collaborative optimization algorithm.Thus, a multi-Vth method considering power constraints for mitigating circuit aging was proposed.Experimental results based on 45nm process model and ISCAS85benchmark circuits showed that the after-aging delay improvement was up to 12.97%with the power constraints,which was obviously better than the existing multi-threshold voltage schemes.In addition,the anti-aging effect could be better if the integration scale of the circuit was larger.
分 类 号:TN406[电子电信—微电子学与固体电子学] TN47
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