空间电子系统FPGA抗单粒子闩锁设计  

Anti single event latch up design for FPGA of space electronics system

作　　者：薛旭成[1] 吕恒毅[1] 韩诚山[1] 

机构地区：[1]中国科学院长春光学精密机械与物理研究所,长春130033

出　　处：《电子测量与仪器学报》2014年第8期865-869,共5页Journal of Electronic Measurement and Instrumentation

基　　金：国家自然科学基金(61036012)资助项目

摘　　要：宇宙空间中存在高能粒子。这些粒子会导致空间电子系统中FPGA发生闩锁。为了避免FPGA闩锁时发生损坏,采用2个稳压器并联供电,在FPGA完成配置后自行关断1个稳压器。由于FPGA配置期间需要大电流,所以采用2个稳压器并联供电。当配置完成后关断1个稳压器,只由1个稳压器供电。如果FPGA发生闩锁,剩下的1个稳压器将会限流,从而避免FPGA被大电流烧毁。关断电路由电阻和电容组成的延时电路控制稳压器使能端实现。实验结果表明:FPGA配置期间2个稳压器都处于输出使能状态,可以提供3.6 A的电流,FPGA可以成功的配置;FPGA配置结束后,则只有1个稳压器给FPGA供电,把电流限制在0.6 A,从而避免FPGA由于闩锁而损坏。该设计可以使得工业级的FPGA应用于空间电子系统中,降低系统成本。There are high energy particles in universe space. FPGAs maybe latch up caused by these particles. In order to avoid FPGA damage while latch up, two regulators are paralleled to power the FPGA, one regulator is powered off automatically when configuration of FPGA completed. High current is needed during FPGA configuration, so two regulators are paralleled. When configuration completed, one regulator is powered off, another is active. If latch up happens, the active regulator will limit the current to avoid FPGA damage caused by high current. Power off circuit is implemented using resistor and capacitor delay circuit to control enable pin of the regulator. The experimental results show that during configuration two regulators are active and 3.6 A current could be supplied. FPGA could be configured successfully. When configuration completed, only one regulator is active, the current is limited to O. 6 A to avoid FPGA damage terns using the above scheme in caused by latch up. Industrial grade FPGA could be used in space electronics sysorder to reduce system cost.

关 键 词：单粒子 闩锁 FPGA 稳压器 

分 类 号：TN47[电子电信—微电子学与固体电子学]