晶圆级传输线脉冲（TLP）测试方法探究  

Study on TLP Testing Method for Wafer

作　　者：邹巧云[1] 姜汝栋 

机构地区：[1]中国电子科技集团公司第五十八研究所,江苏无锡214035

出　　处：《混合微电子技术》2014年第3期68-72,共5页Hybrid Microelectronics Technology

摘　　要：随着晶圆测试技术的发展，TLP测试逐渐由封装级向晶圆级转移，晶圆级TLP测试的出现不仅降低了设计的成本，同时大大缩短了ESD保护结构的评价周期。针对晶圆级TLP测试方法尚无标准可依的现实情况，本文结合理论推导过程，从线路搭建、设备校准、结果确认等关键点探索可行而有效的晶圆级TLP测试方法。With the developments of wafer level testing technology, the TLP tested objeets will be gradually transformed from packaged level into wafer level. The wafer level TLP test not only reduces the design cost, but also greatly shorten the ESD protec- tion structure evaluation cycle. According to the absence of standard for wafer level TLP test, this paper combines the theory deri- vation with the key points of circuit construction, equipment calibration and results certification,it reveals that the wafer level TLP testing method is feasible and effective.

关 键 词：传输线脉冲 测试方法 晶圆级 

分 类 号：TN407[电子电信—微电子学与固体电子学]