基于JESD204协议的高速串行采集系统  

High Speed Serial Data Acquisition System Based on JESD204 Protocol

作　　者：冉焱[1] 席鹏飞[1] 

机构地区：[1]西安电子科技大学电子信息攻防对抗与仿真重点实验室,陕西西安710071

出　　处：《电子科技》2015年第5期17-19,23,共4页Electronic Science and Technology

摘　　要：在通信设施、成像设备、工业仪器仪表等需要大量数据的系统中,要求数据转换级提供越来越宽的分辨率和越来越高的采样率。并行接口的物理布局和串行LVDS方法的比特率限制,给设计人员带来技术障碍。文中基于Xilinx Vertx6 FPGA的GTX高速串行接口实现了JESD204B协议,有效地解决了传统采集数据并行传输时的各种问题。In systems where communication infrastructure, imaging equipment, and industrial instrumentation need large data, it is needed that the data conversion stage provides increasingly wide resolution and high sampling rate. The parallel interface＇s physical layout and the serial LVDS method＇s bit rat bring technical barriers to designers. In this paper, the JESD204B protocol is realized based on Xilinx Vertx6 FPGA＇s GTX, which helps solve the problems in traditional data acquisition parallel transmission.

关 键 词：高速串行接口 GTX XILINX Vertx6 JESD204B 

分 类 号：TN911.73[电子电信—通信与信息系统]