基于自适应HereBoy算法的电路进化设计实验研究  

Research of circuit evolution design based on adaptive Here Boy algorithm

作　　者：吴会丛[1] 王金泽[1] 刘春草[1] 高金金[1] 

机构地区：[1]河北科技大学信息科学与工程学院,河北石家庄050018

出　　处：《河北科技大学学报》2015年第3期293-299,共7页Journal of Hebei University of Science and Technology

基　　金：国家重点实验室基金(9140C87040415JB34004);河北省自然科学基金(F2014208113);教育部留学回国人员科研启动基金

摘　　要：针对电路进化设计演化后期种群收敛速度放慢等问题,采用自适应Here Boy算法,融入遗传算法的群体概念,研究自适应因子在进化算法中对演化收敛速度的影响。运用类神经网络的电路模型和矩阵编码方法对组合电路进行编码,建立了电路编码到电路功能的映射关系,采用外部进化方式进行电路适应度值评估,引入自适应遗传算子提高算法收敛速度和种群多样性。二位二进制乘法器电路的进化结果表明,该方法较传统Here Boy算法在电路进化设计进程中电路平均演化代数及演化时间明显减小,在进化后期,随着种群演化代数增加适应度值平均涨幅提高。Aiming at solving the convergence rate problem in the latter stage of circuit evolution design, adaptive HereBoy algorithm together with the population evolution idea of GA is adapted to study the impact of adaptive-adjust factor on the evolution of convergence rate. One circuit model which is based on the similarities between combinatorial circuit and neural net- work is proposed, on which the matrix encoding scheme of combinatorial circuit is discussed. Besides of this, extrint evolution is adapted to evaluate the circuits fitness value, and adaptive-adjust factor in GA is introduced to improve the population diversi- ty and convergence rate. The implementation of 2-bit binary multiplier circuits evolution shows that the average evolution generations and the evolution time all reduce obviously than conventional HereBoy algorithm, and that the average increase rate raises with the increase of evolution generation in the latter stage of circuit evolution.

关 键 词：电子电路 演化硬件 电路进化 神经网络 HereBoy算法 自适应算子 

分 类 号：TP275.5[自动化与计算机技术—检测技术与自动化装置]