SOI SiGe HBT集电结渡越时间模型研究  

Research of BC Junction Transit Time Model for SOI SiGe HBT

作　　者：徐小波[1,2] 王晓艳[1] 李艳波[1] 胡辉勇[3] 葛建华[2] 

机构地区：[1]长安大学电子与控制工程学院,西安710064 [2]西安电子科技大学通信工程学院ISN国家重点实验室,西安710071 [3]西安电子科技大学微电子学院宽禁带教育部重点实验室,西安710071

出　　处：《微电子学》2015年第5期681-684,共4页Microelectronics

基　　金：中国博士后科学基金资助项目(2013M540732);陕西省自然科学基金资助项目(2014JQ8344)

摘　　要：根据器件实际工作情况,找出SOI器件与传统器件的不同,建立并研究了SOI SiGe HBT集电结渡越时间模型。结果表明,模型与集电区掺杂浓度、集电结偏置电压、传输电流有关,电流的增加恶化了渡越时间,进一步恶化了器件性能。所建模型与仿真结果一致。SOI SiGe HBT集电结渡越时间模型的建立和扩展为SOI BiCMOS工艺的核心参数,如特征频率的设计,提供了有价值的参考。Based on the analysis of the differences between the thin SOI SiGe HBTs and the conventional SiGe HBTs, the corresponding base-collector（BC） space charge region（SCR） transit time model was established from the practical operations. The model had a function of the collector doping concentration, the BC bias voltage and the transfer current. The simulated results showed that the increase of the current had deteriorated the transit time and hence reduced the device performance. The proposed model was consistent with the simulation results. The establishment and its expanding of the SOI SiGe HBTs BC SCR transit time model had provided a valuable guidance for designs of core parameters such as characteristic frequency of the SOI BiCMOS process.

关 键 词：HBT 渡越时间 绝缘体上硅 

分 类 号：TN432[电子电信—微电子学与固体电子学]