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机构地区:[1]西南交通大学微电子研究所,四川成都611756
出 处:《微电子学与计算机》2015年第12期49-53,共5页Microelectronics & Computer
基 金:国家自然科学基金项目(61271090);四川省科技支撑计划项目(2015GZ0103)
摘 要:设计了一款VDMOS器件的元胞结构,采用半超结结构模型.传统VDMOS结构的导通电阻会随着击穿电压的增长而增长,而半超结结构可以缓和两者之间的矛盾.通过调节工艺条件,经过三次外延注入生长形成P柱,并采用增大外延层浓度和改善电荷平衡的方式,来达到减小元胞结构的特征导通电阻和提高击穿电压的目的.最终实现了1 005V的耐压,特征导通电阻102.91mΩ*cm2,栅漏电容5.65pF/cm2,阈值电压3.45V的元胞结构,降低了超结结构的工艺难度,并获得较优的性能.The cell structure of VDMOS has been designed by Semi-super junction. The specific On-resistance in traditional VDMOS structure will increase as the growth of the breakdown voltage. While the Semi-super junction can ease the contradictions between Specific On-resistance and breakdown voltage. By the regulation of the process flow, P column has been achieved in the three times epitaxial growth. In order to reduce specific on-resistance and keep the high voltage, the epitaxial concentration has been increased and charge balance of the cell structure has been formed. The breakdown voltage 1005 V and the specific on-resistance 102. 91 mΩ * cmz have been achieved with the cell structure. The gate-drain capacitance was 5. 65pf/cm2 and the threshold voltage was 3. 45 V. Compared with the super junction, Semi-super junction was reduced the process difficulty. What's more, Semi-super junction devices have excellent performance.
分 类 号:TN386[电子电信—物理电子学]
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