基于NAND FLASH的CPCI存储板设计  

NAND FLASH Memory Board Design is Based on the CPCI

作　　者：陈利杰[1] 罗进川[1] 方东[1] 

机构地区：[1]中国电子科技集团公司第38研究所

出　　处：《仪器仪表用户》2016年第3期27-29,共3页Instrumentation

摘　　要：为了满足实际工作中数据高速记录存储需求,采用NAND flash芯片,本文设计了一款符合CPCI规范的数据存储板。在对NAND flash工作特性分析的基础上,采用总线并行方式构造出存储阵列,并在FPGA中编写了芯片控制逻辑,并通过PCI接口与上位机通信,编程实现对存储板的记录存储操作。该板支持容量为384GB,记录速度,实时记录速度高,工作稳定可靠、很好地满足了工程应用需要。in order to meet the actual demand for high-speed data records are stored in the work, uses NAND flash chip, designed a CPCI-compliant data storage. Analysis of the characteristics of the NAND Flash based on the constructed bus parallel to the storage array and FPGA chips are prepared in the control logic, and communicate with the PC via the PCI interface, program records to storage storage operations. The Board supports 384GB for recording speeds, recording high speed, stable and reliable, meet application needs.

关 键 词：数据存储 坏道管理 NAND FLASH CPCI 

分 类 号：TP[自动化与计算机技术]