三操作数的前导1预测算法纠错编码模块的设计与实现  

Algorithmic Design and Implementation of A Three-Operand Leading-one Prediction Error-Correcting Code Module

作　　者：王京京[1] 富坤[1] 程婷婷[1] 魏思捷[1] 耿跃华[2] 

机构地区：[1]河北工业大学计算机科学与软件学院,天津300401 [2]河北工业大学电气工程学院,天津300130

出　　处：《微电子学与计算机》2016年第4期10-15,共6页Microelectronics & Computer

基　　金：国家自然科学基金(31100711);河北省高等学校科学技术研究青年基金(20111122);河北省交通运输厅科学技术项目计划(Y2011087)

摘　　要：针对三操作数预测算法中的预测误差,提出了纠错方案.依据前导1预测的流程以及预编码规则,设计了纠错模块的预编码规则,完成了其整体结构设计,采用硬件描述语言VHDL进行编程,并通过QuartusⅡ进行仿真验证,得到了相应的RTL级电路,最后对仿真结果进行了分析.仿真结果表明,设计完成的算法结构能够有效地完成前导1预测纠错的功能.In this paper, we propose an error correction scheme based on the prediction error of the three operation number prediction algorithm. According to the process of leading-one prediction and pre-encoding rules, designing a error-correcting module pre-encoding, and completing the overall structure of the error-correcting module, using hardware description language VHDL to program some function module to optimize the design process , and use Quartus Ⅱ tools to perform comprehensive validation, received the RTL-level hardware circuits, and last the results are analyzed and verified. Simulation results show that the designed algorithm structure can effectively complete the Leading-one prediction correcting function.

关 键 词：前导1预测算法 纠错编码模块 FPGA VHDL QuartusⅡ 

分 类 号：TP302.2[自动化与计算机技术—计算机系统结构]