后摩尔时代的3D封装技术--高端通信网络芯片对3D封装技术的应用驱动  

3D-IC Packaging Technology Driven by High-End Communication Network Chips in Post-Moore Law Period

作　　者：王晓明[1] 

机构地区：[1]中兴通讯股份有限公司,广东深圳518055

出　　处：《中兴通讯技术》2016年第4期64-66,共3页ZTE Technology Journal

摘　　要：认为通过封装技术的发展创新延续摩尔定律,满足未来通信芯片及消费性电子的需求已成为业界新的热点。介绍了3D封装技术发展现状与优势,提出"高带宽、高性能、大容量、高密度"通信网络芯片对3D封装技术有迫切的应用需求,并深入分析了堆叠封装技术如何解决400G网络处理器(NP)所面临的瓶颈问题。建议中国芯片产业链应协同合作,从整体上推动IC产业的发展。Developing new package technology to extend Moore＆#39;s law has became one of the hottest spots to meet the needs of both future communication chips and consumer electronics. In this paper, after analyzing and introduction the status and advantages of 3D packaging technology, it is clear that 3D packaging technology is a urgently need to boost up communication network chip to higher bandwidth, higher performance, larger capacity and higher density. Then, we analyze how to solve the bottleneck problem of 400G network processor through stacking packaging in detail. We suggest that the whole Chinese chip industry chain should promote the development of IC industry cooperatively.

关 键 词：后摩尔时代 三维硅通孔 堆叠封装 通信网络芯片 网络处理器 存储墙 

分 类 号：TN405[电子电信—微电子学与固体电子学]