基于μC/OS-Ⅱ的硬件实时操作系统内核设计  被引量:2

Hardware Design and Verification of Real-Time Operating System Kernel Based on μC/OS-Ⅱ

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作  者:徐向权 范延滨[1] 

机构地区:[1]青岛大学计算机科学技术学院,山东青岛266071

出  处:《青岛大学学报(工程技术版)》2017年第1期31-36,共6页Journal of Qingdao University(Engineering & Technology Edition)

基  金:青岛市建设事业科技发展专项(JK2015-25)

摘  要:针对软件实时操作系统并行性低及系统开销大的问题,本文设计了基于μC/OS-Ⅱ的硬件实时操作系统内核。该设计通过将软件实时操作系统中时间复杂度高、实时性要求高的部分划为硬内核,设计了任务、事件、定时、任务调度等硬件电路模块,充分发挥硬件电路的并行性和可靠性,并采用VerilogHDL实现设计。为验证硬核功能的正确性,使用ModelSim进行时序功能仿真,并在ALTERA公司的DE1-SOC开发板和DS-5套件实现开发实验。实验结果表明,该内核能进一步提高实时操作系统的并行性,降低系统开销。该研究具有一定的实际应用价值。To solve the problems of software real-time operating system with low parallelism and high system cost,we design a hardware real-time operating system kernel based onμC/OS-Ⅱ in this paper.The high complexity and high real-time requirement of the parts in software real-time operating system are assigned to hard core,and we design tasks,events,timing,task scheduling and other hardware circuit modules to make full use of parallelism and reliability of hardware circuit and use Verilog HDL to implement our design.In order to verify the correctness of the core function,we use ModelSim to perform simulation and use the ALTERA company's DE1-SOC development board and DS-5suite to achieve development and verification.Experimental results show that the kernel can further improve the parallelism of real-time operating system and reduce the system cost.This research has certain value in practical application.

关 键 词:VERILOG HDL 硬内核 实时操作系统 μC/OS-Ⅱ 

分 类 号:TP316.2[自动化与计算机技术—计算机软件与理论]

 

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