采样保持电路中全差分增益提高放大器设计  

Design of Fully Differential Gain Boosted OPAMP Dedicated to Sample and Hold Circuit

作　　者：钱黎明 魏敬和 

机构地区：[1]中国电子科技集团公司第五十八研究所,江苏无锡214072

出　　处：《电子与封装》2017年第9期19-22,共4页Electronics & Packaging

摘　　要：介绍了一种全差分增益增强CMOS运算放大器的设计和实现。该放大器用于12位20 MHz采样频率的流水线模/数转换器(A/D)的采样保持电路。为了实现大的输入共模范围,采用折叠式共源共栅放大器。主放大器采用开关电容共模反馈电路,辅助放大器则采用简单的连续时间共模反馈电路。该放大器采用CMOS 0.5μm工艺,电源电压为3.3 V。Cadence Spectre仿真结果显示,在负载为6 p F的情况下,其增益为99 d B,单位增益带宽为318 MHz,相位裕度为53°。A kind of gain boosted fully differential CMOS operational amplifier is introduced in this paper. It is used for the Sample and Hold （S＆H） circuits of a 12 bit 20 MHz pipeline A/D convertor. The main amplifier is folded cascode to obtain a large range of input common mode voltage. The switched capacitor Common Mode Feedback circuit （CMFB） is adopted in main amplifier, while simplecontinuous time CMFB is implemented in the auxiliary amplifier to reduce power consumption and simplify the circuit. The amplifier is designed with CMOS 0.5 μm process under 3.3 V power supply. Cadence Spectre simulation result shows that the amplifier has achived the DC gain of 99 dB, the gain bandwidth of 318 MHz and the phase margin of 53 degree at the load of 6 pF.

关 键 词：增益提高 共模反馈 采样保持电路 

分 类 号：TN752[电子电信—电路与系统]