基于FPGA的目标边缘提取硬件加速系统的设计  

Design of Target Edge Extraction Hardware Acceleration System Based on FPGA

作　　者：张庭亮[1] 甄倩倩 胡明明 

机构地区：[1]安阳工学院电子信息与电气工程学院,河南安阳455000 [2]安阳师范学院软件学院,河南安阳455000

出　　处：《山西大同大学学报（自然科学版）》2017年第5期27-30,共4页Journal of Shanxi Datong University(Natural Science Edition)

摘　　要：传统的视频图像处理实时性不高,数据端与主机联动性差。为了提高目标边缘提取的实时性与实用性,设计了基于FPGA的目标边缘提取硬件加速系统。系统通过IIC总线配置摄像头参数采集视频数据,硬件滤波后由FPGA边缘检测模块提取边缘数据存入SDRAM。VGA控制模块将存储的数据输出至显示器显示。设计实现了对视频图像边缘实时提取,并在分辨率为640x480在显示器实时显示。经过测试,系统提取目标边缘清晰,实时性与实用性较高。The traditional video image processing real-time is not high, the data side and the host linkage is poor. In order to improve the real-time and practicality of target edge extraction, an FPGA-based target edge extraction hardware acceleration system is designed. System through the IIC bus configuration camera can collect video data, filter hardware by the edge detection module to extract the edge data into the SDRAM. The VGA control module outputs the stored data to the display. The design can to achieve realtime extraction of video image edges, and real-time display at a resolution of 640 x480 on the display. After testing, the system can extract the target edge clear, which is real-time and practical.

关 键 词：FPGA 边缘检测 硬件加速 实时显示 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]