用于BAN的自校准SAR ADC设计  

Design of a SAR ADC with Self-Calibration for BAN

作　　者：周前能[1] 徐海峰 李云松[1] 唐政维[1] 李红娟[1] 罗伟 ZHOU Qianneng XU Haifeng LI Yunsong TANG Zhengwei LI Hongjuan LUO Wei(Chongqing Key Laboratory of Photoelectronic Information Sensing and Transmitting Technology, Chongqing University of Posts and Telecommunications, Chongqing 400065, 19. R. China School of Physics and Electronic Engineering, Sichuan University of Science and Engineering, Zigong, Sichuan 643000, 19. R. China)

机构地区：[1]重庆邮电大学光电信息感测与传输技术重庆重点实验室,重庆400065 [2]四川理工学院物理与电子工程学院,四川自贡643000

出　　处：《微电子学》2017年第5期639-643,共5页Microelectronics

基　　金：国家自然科学基金资助项目(61471075);重庆市自然科学基金资助项目(CSTC2016JCYJA0347);重庆市重点产业共性关键技术创新专项项目(cstc2016zdcy-ztzx0038);模拟集成电路重点实验室基金项目(61428020115162802003)

摘　　要：基于SMIC 0.18μm CMOS混合信号工艺,设计了一种适用于体局域网(BAN)的自校准逐次逼近型模数转换器(SAR ADC)。基于BAN系统的特点,设计的SAR ADC采用阻容混合型主数模转换器(DAC)及电容型校准DAC等结构。采用误差自校准技术来校准SAR ADC的阻容混合型主DAC的高5位电容失配误差,有效降低了SAR ADC非线性误差。仿真结果表明,自校准SAR ADC获得了±0.3LSB微分非线性、±1LSB积分非线性、82.2dB信噪比等性能特性。设计的SAR ADC具有良好的性能,适合于BAN系统。A successive approximation register（SAR）analog-to-digital converter（ADC）was designed for body area network（BAN）in the SMIC 0.18μm CMOS mixed-signal process.Based on the characteristics of BAN system,the resistor-capacitor（R-C）hybrid master digital-to-analog converter（DAC）and the capacitance calibration DAC were adopted.An error self-calibration technique was used to calibrate the high 5-bits capacitor mismatch errors of the R-Chybrid master DAC,and the nonlinear errors of the SAR ADC was reduced effectively.Simulation results showed that the proposed self-calibration SAR ADC had achieved performances of ±0.3 LSB differential nonlinearity（DNL）,±1 LSB integral nonlinearity（INL）and 82.2 dB signal to noise ratio（SNR）.The self-calibration SAR ADC had nice performances and was suitable for the BAN system.

关 键 词：体局域网 模数转换器 数模转换器 逐次逼近 

分 类 号：TN432[电子电信—微电子学与固体电子学]