一种兼容SMBus协议的I2C总线控制器的设计  

An I2C Bus Controller Compatible with SMBus Protocol

作　　者：王芬芬 冯海英 丁柯 WANG Fenfen;FENG Haiying;DING Ke(China Key System Co,Ltd,Wuxi 214072,China)

机构地区：[1]中科芯集成电路股份有限公司,江苏无锡214072

出　　处：《电子与封装》2018年第9期20-25,32,共7页Electronics & Packaging

摘　　要：为了满足片上系统(SOC,System On Chip)中高性能且低成本的知识产权(IP,Intelligence Property)复用技术,提出了一种兼容SMBus 2.0(SMBus,System Management Bus)协议的I2C(I2C,Inter-integrated circuit)总线控制器的设计。该设计既保证I2C和SMBus各自的功能和时序,又极大地节省了硬件资源,可广泛应用于这两者的外设通信环境中。此外,该设计基于高性能外设总线(APB,Advance Peripheral Bus)接口,采用Verilog HDL实现,可方便地集成到SOC系统中。最后,搭建仿真验证平台,验证了该I2C总线控制器的兼容性,证明其总线功能的完善性、总线时序的规范性以及总线通信的稳定性。An I2 C bus controller compatible with SMBus protocol 2.0 is proposed to meet the Intelligence Property reuse technology of SOC with high performance and low cost. The design not only ensures functions and timing of I2 C and SMBus, but greatly saves hardware resources. It can be widely used in the peripheral communication environment of both of I2 C and SMBus. In addition, the design is based on APB interface and the implementation of Verilog HDL, which can be easily integrated into SOC system. Finally, the compatibility of I2 C bus controller is verified, and its bus function perfection, bus timing specification and bus communication stability are proved.

关 键 词：I2C总线 SMBUS总线 SOC VERILOG HDL 

分 类 号：TN402[电子电信—微电子学与固体电子学]