基于FPGA的数字接收机信噪比提高方法研究  

Research on methods of improving SNR for digital receiver based on FPGA

作　　者：翟羽佳[1] 聂慧锋 ZHAI Yu-jia;NIE Hui-feng(No.723 Research Institute of CSIC,Yangzhou 225001,China)

机构地区：[1]中国船舶重工集团公司第七二三研究所,江苏扬州225001

出　　处：《雷达与对抗》2018年第3期53-57,共5页Radar & ECM

摘　　要：雷达信号侦察系统中,基于现场可编程逻辑门阵列(FPGA)的数字接收机进行时域检测时输入数据的信噪比(SNR)对系统的检测概率和虚警概率的影响至关重要。对数字接收机各处理过程中提高信噪比的几种主要方法进行分析和仿真,总结出这几种方法的优点和缺点,并对其工程实现时的参数选择提出建议。提出一种在自相关运算之后再次对信号的幅度包络进行滤波的方法,其工程实现较为简单,且信噪比提升效果明显。将该方法与自相关算法相结合,可以在提高信噪比的同时尽量保持信号幅度包络边沿的细节。In radar signal reconnaissance system, the signal-to-noise ratio （SNR） of the input datahas a crucial effect on the detection probability and false alarm probability when time domain detection is performed for the digital receiver based on the FPGA. This paper analyzes and simulates theseveral main methods of improving the SNR in digital receiver processing, and summarizes the advantages and disadvantages of these methods, and then gives some advice on parameters setting inengineering implementation. A method of filtering the amplitude envelope of the signals after the autocorrelation operation is proposed, with simple engineering implementation, which can significantlyimprove the SNR. This method combined with the autocorrelation algorithm can improve the SNRwhile keeping the details of the signal amplitude envelope edge as much as possible.

关 键 词：数字接收机 信噪比 信道化 自相关 非线性滤波 中值滤波 

分 类 号：TN971[电子电信—信号与信息处理]