基于FPGA的EtherCAT协议链路冗余研究  

Research on link redundancy of EtherCAT protocol based on FPGA

作　　者：黄兵[1] 丰大军[1] 刘云龙[1] 王皓[1] 

机构地区：[1]华北计算机系统工程研究所,北京100083

出　　处：《电子技术应用》2017年第9期80-82,86,共4页Application of Electronic Technique

基　　金：核高基重大专项(2017ZX01030202);共用技术基金(9140A20-060315D266001)

摘　　要：EtherCAT是一种实时工业以太网协议,使用链路冗余技术是实现链路稳定性和可靠性的重要手段。介绍了基于FPGA的EtherCAT链路冗余原理,设计通过FPGA实现主站与从站、从站与从站之间的通信链路与冗余链路的自动切换,从而实现EtherCAT的链路冗余。通过测试验证了此方法的可行性,增加了EtherCAT系统的可靠性与可维护性。EtherCAT is a real-time industrial Ethernet protocol. The use of link redundancy is an important means of achieving link stability and reliability. This article describes the FPGA based EtherCAT link redundancy principle. This design uses FPGA to achieve the automatically switch of the communication link and redundant link between master station and slave station, or the slave and the slave, in order to achieve the link redundancy of EtherCAT. The feasibility of this method is verified by testing.

关 键 词：ETHERCAT FPGA 冗余 

分 类 号：TN791[电子电信—电路与系统] TP273[自动化与计算机技术—检测技术与自动化装置]