基于FPGA的UART模块设计与实现  

Design and Realization of UART Module Based on FPGA

作　　者：刘博 LIU Bo(Luoyang Institute of Electro-Optical Equipment,AVIC,Luoyang 471000,China)

机构地区：[1]航空工业集团公司洛阳电光设备研究所,河南洛阳471000

出　　处：《无线电工程》2018年第5期433-438,共6页Radio Engineering

摘　　要：为了方便FPGA和CPU或者其他设备之间的数据传输,实现了一个可编程的通用异步收发器(UART)模块。采用Verilog HDL语言作为硬件功能的描述,硬件采用Alter公司的EP2C5T144C8N芯片,运用模块化设计方法分别设计了UART的发送器、接收器和波特率发生器。用Modelsim进行时序仿真,并用USB-Blaster在QuartusⅡ环境下进行设计、编译,经串口助手进行验证,数据传输快速、准确。In order to make it easier for data communication between FPGA and CPU or other devices,a programmable module of UART(Universal Asynchronous Receiver/transmitter)is implemented in this paper.Verilog HDL is used as hardware function description language,with Altera’s EP2C5T144C8N FPGA chip as hardware platform.The transmitter,receiver and baud rate generator for UART are designed respectively by modular design method.Finally,timing simulation of circuit is performed by Modelsim software and the design and compiling are made by QuartusⅡusing USB-Blaster.Results of testing and verifying by serial port assistant show data transmission is fast and accurate.

关 键 词：现场可编程门阵列 串行通信 VERILOG HDL语言 Modelsim仿真 

分 类 号：TN919.3[电子电信—通信与信息系统]