适用于功率运算放大器的输入级放大电路设计  

Design of input stage amplifier circuit for power operational amplifiers

作　　者：王勇勇 杨发顺 王德成[3] 胡锐 马奎 Wang Yongyong;Yang Fashun;Wang Decheng;Hu Rui;Ma Kui(School of Big Data and Information Engineering,Guizhou University,Guiyang 550025,China;Key Laboratory of Micro-Nano-Electronics of Guizhou Province,Guiyang 550025,China;Guizhou Zhenhua Feng Guang Semiconductor Co.,Ltd.,Guiyang 550018,China)

机构地区：[1]贵州大学大数据与信息工程学院,贵州贵阳550025 [2]贵州省微纳电子与软件技术重点实验室,贵州贵阳550025 [3]贵州振华风光半导体有限公司,贵州贵阳550018

出　　处：《电子技术应用》2019年第1期27-30,共4页Application of Electronic Technique

基　　金：国家自然科学基金(61464002;61664004);贵州省重大科技专项(黔科合重大专项字[2015]6006);贵州省科技计划项目(黔科合平台人才[2017]5788号)

摘　　要：基于70 V高压双极型工艺,设计了一种适用于单片高压功率运算放大器的输入级电路。该电路采用p沟道结型场效应晶体管(JFET)组成的差分对套筒式共源共栅(differential telescopic cascode)结构,具有低偏置电流、低失调电压、低失调电流、高共模抑制比的特点。以共集-共射(CC-CE)的放大电路结构作为该输入级电路的负载,减小对输入级影响的同时能够提高电压增益。Spectre仿真结果表明,输入偏置电流仅为20 pA,失调电压为0.11 mV,失调电流为0.57 fA,连接负载后的增益可以达到89 dB,单位增益带宽达到8.13 MHz。An input stage amplifier is designed for a power operational amplifier based on 70 V high voltage bipolar technology.The amplifier circuit implements a differential telescopic cascode pair using p-type JFETs.It has figure of merits involving low bias current,low offset voltage and current,and high CMRR.The common-collector common-emitter(CC-CE)configuration is used as the load for the input stage circuit in order to reduce the impact resulting from the load and improve the voltage gain as well.Simulation results based on Spectre simulator indicate that the input stage amplifier circuit has achieved 20 pA input bias current,0.11 mV offset voltage and 0.57 fA offset current,while the voltage gain is 89 dB and the unit gain-bandwidth is 8.13 MHz,with the CC-CE load.

关 键 词：差分套筒共源共栅 JFET 低偏置电流 功率运放 

分 类 号：TN431.1[电子电信—微电子学与固体电子学]