一种FIFO的读写单元设计  

A Design of Read-Write Unit for FIFO

作　　者：刘环雨 

机构地区：[1]沈阳城市建设学院信息与控制工程系,沈阳110167

出　　处：《微处理机》2019年第1期13-15,共3页Microprocessors

摘　　要：作为一种先进先出式的数据缓存器,与普通存储器的相比,FIFO省去了外部读写地址线,使用起来更加简便,可以顺序写入/读出数据,其数据地址由内部读写指针自动加1完成,实现不同时钟域之间的数据传输。FIFO电路的核心部分是存储单元,由数据接口部分实现数据存储和缓冲,但在大容量FIFO芯片里存储单元普遍占用面积较大,对FIFO的速度和功耗都有较大影响,针对此问题,从作为存储单元核心的读写通道入手,对FIFO读写单元进行设计,节省了芯片面积,降低了电路功耗,提高了器件工作的稳定性和速度。As a first-in-first-out data buffer, compared with ordinary memory, FIFO dispenses with external read-write address lines, is simpler to use, can sequentially write/read data, and its data address is automatically added by 1 by internal read-write pointer, thus realizing data transmission between different clock domains. The core part of FIFO circuit is memory unit. Data storage and buffering are realized by data interface part. However, memory unit generally occupies a large area in large-capacity FIFO chips, which has a great impact on the speed and power consumption of FIFO. To solve this problem, starting from the read-write channel as the core of memory unit, the FIFO read-write unit is designed, which saves chip area, reduces circuit power consumption, and improves the stability and speed of device operation.

关 键 词：FIFO 存储器 存储单元 读写通道 

分 类 号：TN47[电子电信—微电子学与固体电子学]