基于Verilog的VGA显示控制电路设计  

VGA Display Control Circuit Design Based on Verilog

作　　者：王涌 肖顺文 罗春梅 WANG Yong;XIAO Shun-wen;LUO Chun-mei(School of Electronic and Information Engineering ,China West Normal University,Nanchong Sichuan 637009)

机构地区：[1]西华师范大学电子信息工程学院

出　　处：《数字技术与应用》2019年第4期150-151,153,共3页Digital Technology & Application

基　　金：四川省教育厅科研基金重点项目(15ZA0145)

摘　　要：采用自上而下的设计方法实现了一个分辨率较高、显示迅速且协议简单的VGA显示控制电路。在QUARTUS Ⅱ 13.1软件开发平台上使用Verilog HDL语言来完成时序模块和彩条像素模块的描述、编译,最后在第三方仿真工具Modelsim-Altera中对其进行模拟仿真,结果显示,该设计满足系统要求,能够成功的通过VGA接口在显示器上显示图案。Based on Verilog HDL hardware description language, using the method of "top-down", this paperdesigns a high resolution, fast display speed, simple protocol of VGA display control circuit. In the FPGA development platform, Quartus Ⅱ13.1, using Verilog HDL language to complete the description and compilation of timing module and color bar pixel module. Finally, the third party simulation tool modelsim-altera was used solely for simulation. The results showed that the design was compatible with the requirements of the system and could successfully display the pattern on the display through the VGA interface.

关 键 词：VERILOG HDL语言 VGA技术 QUARTUS Ⅱ 13.1 Modelsim-Altera 

分 类 号：TN92[电子电信—通信与信息系统]