采用软硬件协同设计的SoftMax函数的FPGA实现  

SoftMax function software and hardware co-design based on FPGA

作　　者：周维康 王才才 张皓清 黄静[1] 

机构地区：[1]南通大学信息科学技术学院

出　　处：《信息通信》2019年第10期59-60,共2页Information & Communications

基　　金：南通大学大学生创新训练项目（2019100）资助

摘　　要：人工神经网络中,需要对大量数据进行非线性函数计算。低功耗实现和非线性函数的加速运算成为急需解决的需求。论文基于ZYNQ硬件平台和ARM处理器,进行了软硬件协同设计和FPGA硬件加速器IP的设计,实现了非线性激活函数SoftMax,功耗和误差分布达到设计预期。Large amounts of data are required to perform nonlinear function calculations in artificial neural networks.Low power consumption and nonlinear function acceleration are the key problems.Hardware and software co-design and hardware accelerator IP design were carried out based on ZYNQ hardware platform and ARM processor,and nonlinear activation function SoftMax was realized based on FPGA.Power consumption and error distribution reached the design expectation.

关 键 词：FPGA 激活函数 软硬件协同 硬件加速 

分 类 号：TN4[电子电信—微电子学与固体电子学]