一种用于激光背面测试CMOS图像芯片的封装方法研究  

Study on Packaging of CMOS Image Chip for Laser Back Testing

作　　者：史海军 叶红波[1] SHI Haijun;YE Hongbo(Testing Technology Department of Shanghai IC R&D Center,Shanghai 201203,China)

机构地区：[1]上海集成电路研发中心测试技术部

出　　处：《集成电路应用》2020年第1期29-31,共3页Application of IC

基　　金：国家科技重大专题课题(2011ZX02702_004)

摘　　要：研究方向是最终用于激光背面测试的 CMOS 图像芯片 PLCC 封装方法,通过采用 DOE 实验优化的方法,以封装工艺中键合的实际键合效率为依据,得出了关于封装中底部压块设计的最优方案,以确保 CMOS 图像芯片封装可以稳定高效地完成。The research direction in this paper is the CMOS image chip PLCC packaging method which is finally used for laser back surface testing.By using the DOE experimental optimization method and based on the actual bonding efficiency of the bonding in the packaging process,the bottom pressure in the package is obtained.The optimal design of the block design to ensure that the CMOS image chip package can be completed stably and efficiently.

关 键 词：集成电路制造 CMOS图像芯片封装 PLCC封装 激光背面测试 DOE实验优化 键合 

分 类 号：TN47[电子电信—微电子学与固体电子学] TN215