一种基于SystemVerilog的CORDIC算法IP核实现方案  

Implementation Method for CORDIC IP Core based on SystemVerilog

作　　者：盛业斐 SHENG Ye-fei(School of Overseas Education,Nanjing University of Posts and Telecommunications,Nanjing Jiangsu 210023,China)

机构地区：[1]南京邮电大学海外教育学院

出　　处：《通信技术》2020年第1期240-244,共5页Communications Technology

摘　　要：CORDIC是一种坐标旋转算法,常用来计算向量旋转、三角与反三角函数以及数乘、除法等初等函数值。但是,由于它的形式多样,在FPGA硬件实现时,常规做法是根据不同计算需求设计特定的RTL代码,导致灵活性和可移植性受到了极大限制。因此,根据CORDIC各种运算形式的特点,利用SystemVerilog语言实现了CORDIC算法通用IP核制作,大大提高了代码的灵活性和可移植性,并且在FPGA中得到了仿真验证。CORDIC(Coordinate Rotation Digital Computer)is a coordinate rotation algorithm that is commonly used to calculate the values of elementary functions such as vector rotation,trigonometric and inverse trigonometric functions,and multiplication and division.However,due to its various forms,in FPGA hardware implementation,it is a common practice to design specific RTL code according to different computing requirements,resulting in great limitations in flexibility and portability.Therefore,according to the characteristics of CORDIC various operation forms,SystemVerilog language is used to implement the CORDIC algorithm general IP core production.It greatly improves the flexibility and portability of the code,and has been verified by simulation in FPGA.

关 键 词：CORDIC SYSTEMVERILOG IP核 FPGA 

分 类 号：TN911.72[电子电信—通信与信息系统]