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作 者:张彦军 谢俊[1] 薛涛 曹国智 徐光华[1] 李敏[1] ZHANG Yanjun;XIE Jun;XUE Tao;CAO Guozhi;XU Guanghua;LI Min(School of Mechanical Engineering,Xi’an Jiaotong University,Xi’an 710049,China)
机构地区:[1]西安交通大学机械工程学院
出 处:《西安交通大学学报》2020年第2期158-165,共8页Journal of Xi'an Jiaotong University
基 金:国家自然科学基金资助项目(61503298)
摘 要:针对稳态视觉诱发电位(SSVEP)脑机接口(BCI)系统对计算机性能要求较高的问题,提出一种以现场可编程门阵列(FPGA)和商用脑电采集设备为核心的SSVEP-BCI系统。该系统通过FPGA独立的显示模块,实现了视频图形矩阵(VGA)接口的控制;按照显示刷新帧的方式分配闪烁频率对应的范式图案,实现了诱发SSVEP信号所需范式的稳定显示。通过实验对所设计的VGA视觉刺激器光闪烁频率进行采集分析可知,视觉刺激器范式显示频率与所设计的频率基本一致,可用于SSVEP诱发实验。结合所设计的视觉刺激器,完成了基于FPGA的脑电信号处理和特征识别。设计方案使用串口将脑电信号传输到FPGA端,采用快速傅里叶变换分析频率成分,对视觉刺激器对应的频率进行分析比较,最终通过实验对系统进行验证。结果表明:设计的系统在4个刺激目标和单次实验时长2 s的情况下,实现了平均85.25%的识别正确率,表明系统能够实现SSVEP信号的诱发和有效识别,并且能够达到较好的效果。To solve the problem that the steady-state visual evoked potential(SSVEP)brain-computer interface(BCI)system requires high computer performance,a SSVEP BCI system based on field programmable gate array(FPGA)and commercial electroencephalogram(EEG)acquisition device is designed by an independent display module based on FPGA.This system realizes the control of video graphics array(VGA)interface.The paradigm patterns corresponding to different flicker frequencies are allocated according to the displaying refresh frames,and the stable display of the paradigm required to induce SSVEP signals can be achieved.Collecting and analyzing the flicker outputs of the designed VGA visual stimulator,the presenting frequencies from the visual stimulator are approximately equal to the required frequencies and can be used for SSVEP BCI experiments.Combined with the designed visual stimulator,the FPGA based EEG signal processing and feature recognition are also implemented in this approach.EEG signals are transmitted to the FPGA end via the serial port,and fast Fourier transform(FFT)is used to analyze the frequency components,and these frequency components are then compared with the presenting frequencies from the visual stimulator.The overall system is verified by experiments.It is revealed that the SSVEP BCI system based on FPGA achieves an average recognition accuracy of 85.25%in the case of four stimulus targets and two seconds of single-trial time window.The proposed system can induce and recognize SSVEP signals effectively and achieve satisfactory recognition results.
关 键 词:稳态视觉诱发电位 脑机接口 现场可编程门阵列 数据处理 特征识别
分 类 号:TP23[自动化与计算机技术—检测技术与自动化装置]
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