重掺As衬底上超高阻薄层硅外延片的制备  

Preparation of Ultra-High-Resistance Thin-Layer Silicon Epitaxial Wafers on Heavily As-Doped Substrate

作　　者：薛宏伟[1,2] 米姣 袁肇耿 王刚[1,2] 张志勤 Xue Hongwei;Mi Jiao;Yuan Zhaogeng;Wang Gang;Zhang Zhiqin(Hebei Poshing Electronics Technology Co.,Ltd.,Shijiazhuang 050200,China;Silicon Base Epitaxial Material Engineering Technology Research Center of Hebei Province,Shijiazhuang 050200,China)

机构地区：[1]河北普兴电子科技股份有限公司,石家庄050200 [2]河北省硅基外延材料工程技术研究中心,石家庄050200

出　　处：《半导体技术》2020年第3期200-205,共6页Semiconductor Technology

摘　　要：超高阻薄层硅外延片可用于制备光电探测器的二极管、瞬态电压抑制二极管等分立器件。利用E200型单片外延炉在直径为150 mm的重掺As硅单晶衬底上制备了参数可控且均匀性高的外延层。采用多次本征生长技术,在重掺As硅衬底边缘形成掺杂原子耗尽层,有效减少了重掺As硅衬底的自掺效应。同时应用低温外延技术、无HCl抛光技术,研制出超高阻薄层硅外延片,外延层电阻率为1093Ω·cm,外延层厚度为12.06μm,满足外延层厚度(12±1)μm、外延层电阻率大于1000Ω·cm的设计要求,片内电阻率不均匀性为4.36%,片内厚度不均匀性为0.5%。外延片已用于批量生产。Ultra-high-resistance thin-layer silicon epitaxial wafers can be used in photodetector diodes,transient voltage suppression diodes and other discrete devices.The epitaxial layer with controllable parameters and fine uniformity was manufactured by using E200 single wafer reactor on the heavily As-doped silicon single crystal substrate with a diameter of 150 mm.By adopting the key technique of multiple intrinsic growth,the doped atom depletion layer was formed at the edge of the heavily As-doped substrate,and the self-doping effect of heavily As-doped substrate was effectively reduced.And by using the technology of low temperature epitaxy and HCl-free polishing,the ultra-high-resistance thin-layer silicon epitaxial wafer was successfully developed.The thinkness of the epitaxial layer is 12.06μm,the resistivity of the epitaxial layer is 1093Ω·cm,which satisfies the design requirements of the epitaxial layer thickness(12±1)μm and epitaxial layer resistivity over 1000Ω·cm.The resistivity nonuniformity across the wafer is 4.36%,and the thickness nonuniformity across the wafer is 0.5%.The epitaxial wafers have been used in batch production.

关 键 词：硅外延片 超高阻 多次本征工艺 低温外延 无HCl抛光 电阻率不均匀性 

分 类 号：TN304.054[电子电信—物理电子学]