薄层高阻硅外延制备工艺研究  被引量:1

Research on Thin-layer High-resistance Silicon Epitaxial Preparation Process

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作  者:傅颖洁[1] 李明达[1] FU Yingjie;LI Mingda(^th Research Institute,China Electronics Technology Group Corporation,Tianjin 300220,China)

机构地区:[1]中国电子科技集团公司第四十六研究所,天津300220

出  处:《天津科技》2020年第5期81-83,共3页Tianjin Science & Technology

摘  要:轻掺硅外延层/重掺衬底结构作为现代电力电子器件的关键基础材料,其厚度均匀性、电阻率均匀性等关键参数与所制器件的性能密切相关。通常基于重掺衬底的轻掺硅外延层,电阻率比厚度数值至少会低1个数量级,可以有足够的反应时间爬升到稳定轻掺态。但在特定的应用领域,所需外延层电阻率高于厚度数值2倍以上,并且要求电阻率、厚度参数控制精确。传统外延工艺中电阻率受自掺杂影响,爬升速率缓慢,均匀性始终不能达到预期目标。基于外延掺杂机理,通过设计低温外延生长、基座包硅等多种手段,可有效抑制系统自掺杂干扰,实现了硅外延层厚度不均匀性<1.5%,电阻率不均匀性<2%的研制目标。Lightly doped silicon epitaxial layer/heavily doped substrate structure is a key basic material for modern power electronic devices.The key parameters such as thickness uniformity and resistivity uniformity are closely related to the performance of the fabricated device.Generally,the lightly doped silicon epitaxial layer based on a heavily doped substrate has a resistivity at least an order of magnitude lower than the thickness value,and can have sufficient reaction time to climb to a stable lightly doped state.However,in specific application field,the required resistivity of the epitaxial layer is more than twice the thickness value,and precise control of resistivity and thickness parameters is required.In the traditional epitaxial process,the resistivity is affected by self-doping,the climb rate is slow,and the uniformity cannot always reach the expected target.Based on the epitaxial doping mechanism,this paper effectively designed the low-temperature epitaxial growth,silicon on substrate and other means,which can effectively suppress the self-doping interference of the system and achieve the silicon epitaxial layer thickness non-uniformity of<1.5%and resistivity non-uniformity of<2%.

关 键 词:硅外延 高均匀性 薄层 高阻 

分 类 号:TN304.[电子电信—物理电子学]

 

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