基于FPGA的FIR数字滤波器设计及实现  

Design and implementation of FIR digital filter based on FPGA

作　　者：宋卓达 王志乾[1] 李建荣[1] 沈铖武[1,2] 刘绍锦 SONG Zhuo-da;WANG Zhi-qian;LI Jian-rong;SHEN Cheng-wu;LIU Shao-jin(Changchun Institute of Optics,Fine Mechanics and Physics,Chinese Academy of Sciences,Changchun 130033,China;University of Chinese Academy of Sciences, Beijing 100049, China)

机构地区：[1]中国科学院长春光学精密机械与物理研究所,吉林长春130033 [2]中国科学院大学,北京100049

出　　处：《液晶与显示》2020年第10期1073-1078,共6页Chinese Journal of Liquid Crystals and Displays

基　　金：吉林省科技厅技术攻关项目(No.20190302086GX,No.20200403067SF)。

摘　　要：针对应变信号采集系统中的信号处理环节,设计并实现一种基于现场可编程门阵列(FPGA)的FIR数字滤波器。首先,基于Matlab采用克莱德曼窗函数设计一个长度为16的15阶数字滤波器,并生成高斯白噪声与频率为2 kHz、8 kHz正弦波的合成信号,然后量化12位系数,将系数文件导入QuartusⅡ13.1软件,结合FPGA内部数字滤波器IP核,采用自上而下的方式设计出FIR数字滤波器,最终在Simulink环境下对其进行仿真。实验结果表明,滤波前后合成信号的均方误差下降28.5%,提高了低频信号质量,增强了应变信号采集系统的功能性和集成度。A Finite Impulse Response(FIR)digital filter based on Field Programmable Gate Array(FPGA)is designed and implemented for signal processing in strain signal acquisition system.Firstly,based on MATLAB,Blackman window function is used to design a 15 order digital filter with 16 length,and the signal is composed of white Gaussian noise and sine wave with frequency of 2 kHz and 8 kHz.Then the 12 bit coefficients are quantized,and the coefficient file is imported into QuartusⅡ13.1 software.Combining with the IP core of digital filter in FPGA,FIR digital filter is designed from top to bottom.Finally,it is simulated in Simulink environment.The results show that the mean square error of the synthesized signal decreases by 28.5%before and after filtering,which can improve the quality of low frequency signal and enhanced the function and integration of the strain signal acquisition system.

关 键 词：信号采集 FIR数字滤波器 FPGA IP核 

分 类 号：TN911.72[电子电信—通信与信息系统] TN713.7[电子电信—信息与通信工程]