埋栅型SIT和VDMOS的单粒子烧毁效应对比研究  

Comparative Study on Single-Event Burnout Effect of Buried-Gate Static Induction Transistor and Vertical Double-Diffused MOSFET

作　　者：蔡浩 张霞 王斌[3] 谭开洲[2] CAI Hao;ZHANG Xia;WANG Bin;TAN Kaizhou(College of Optoelectronic Engineering,Chongqing University of Posts and Telecommunications,Chongqing 400065,P.R.China;Science and Technology on Analog Integrated Circuit Laboratory,Chongqing 400060,P.R.China;The 24th Research Institute of China Electronics Technology Group Corp.,Chongqing 400060,P.R.China)

机构地区：[1]重庆邮电大学光电工程学院,重庆400065 [2]模拟集成电路国家重点实验室,重庆400060 [3]中国电子科技集团公司第二十四研究所,重庆400060

出　　处：《微电子学》2020年第5期755-760,共6页Microelectronics

基　　金：模拟集成电路国家重点实验室基金资助项目(6142802180503)。

摘　　要：对埋栅型静电感应晶体管(SIT)和垂直双扩散MOSFET(VDMOS)的抗单粒子烧毁(SEB)能力进行了仿真对比研究。利用Medici软件,仿真得到两种器件发生SEB效应前后的漏极电流响应和发生单粒子烧毁效应的临界漏极偏压。仿真结果表明,SIT与VDMOS两种器件常态击穿分别为580 V和660 V,在栅极关断电压为-10 V下,SIT的单粒子烧毁效应临界漏极电压为440 V,远高于VDMOS关断时230 V的临界漏极电压;SIT发生SEB效应时的漏极电流数量级为10^-3A/μm,而VDMOS发生SEB效应时的漏极电流数量级为10^-4A/μm,SIT在抗SEB效应方面比VDMOS具有更大的优势。同类研究少见文献报道。对埋栅SIT样品进行了试制,样品击穿电压为530 V。The single-event burnout(SEB)of buried-gate static induction transistor(SIT)and vertical double-diffused MOSFET(VDMOS)were compared and studied.The drain current response before and after SEB effect and the minimum drain bias with SEB effect were simulated by using Medici Software.The results showed that the normal breakdown of SIT and VDMOS devices was 580 V and 660 V respectively.Under the gate turn-off voltage of-10 V,the critical drain voltage of SIT’s SEB effect was 440 V,which was much higher than the 230 V critical drain voltage of VDMOS.The magnitude of the drain current when SEB effect occurred was 10^-3A/μm and VDMOS was 10^-4A/μm.The buried-gate SIT had more advantages than VDMOS in anti-SEB effect.Similar studies rarely reported in the literature.The buried-gate SIT sample was trial-produced,and the breakdown voltage was 530 V.

关 键 词：静电感应晶体管 垂直双扩散MOSFET 单粒子烧毁效应 MEDICI 

分 类 号：TN386[电子电信—物理电子学]