基于SystemVerilog的超高频RFID标签数字基带设计与研究  

Design and research on digital baseband of RFID tag based on SystemVerilog

作　　者：汪永峰 卜刚[1] Wang Yongfeng;Bu Gang(School of Electronic Information Engineering,Nanjing University of Aeronautics and Astronautics,Nanjing 211106,China)

机构地区：[1]南京航空航天大学电子信息工程学院,江苏南京211106

出　　处：《电子技术应用》2021年第1期36-40,共5页Application of Electronic Technique

基　　金：江苏省自然科学基金(BK2012792)。

摘　　要：在ISO/IEC 18000-6C标准协议的基础上,对超高频射频识别(UHF RFID)标签数字基带的设计与实现展开研究。根据协议规定的标签数字基带的设计要求和指标,采用SystemVerilog分别对标签发送和接收基带进行建模,并给出基带中关键模块的理论推导和设计实现。SystemVerilog作为Verilog基础上拓展产生的硬件描述语言和验证语言,可以大幅度提高SoC设计的效率。最后使用Modelsim SE-6410.4对标签数字基带设计进行仿真,结果表明该数字基带符合ISO/IEC 18000-6C协议要求,该设计为单芯片UHF RFID标签提供了设计参考。Based on the ISO/IEC 18000-6C standard protocol,this paper conducted research on the design and implementation of UHF RFID tag′s physical layer baseband circuit.According to the design requirements and indicators of the baseband specified in the standard protocol,SystemVerilog was used to model the tag sending and receiving basebands,and the theoretical derivation and design implementation of the key modules in the baseband were given.SystemVerilog,as a hardware description and verification language developed on the basis of Verilog,can greatly improve the efficiency of SoC design.Finally,Modelsim SE-6410.4 was used to simulate the digital baseband circuit design of the tag.The results showed that the digital baseband met the requirements of ISO/IEC 18000-6C protocol.This design provides a design reference for single-chip UHF RFID tag.

关 键 词：ISO/IEC 18000-6C SYSTEMVERILOG 通信链路 RFID 仿真验证 

分 类 号：TN402[电子电信—微电子学与固体电子学]