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作 者:林晓玲 章晓文 高汭 LIN Xiaoling;ZHANG Xiaowen;GAO Rui(Key Laboratory on Reliability Physics and Application of Electrical Component, China Electronic Product Reliability and Environmental Testing Research Institute, Guangzhou 510610, Guangdong, China)
机构地区:[1]工业和信息化部电子第五研究所电子元器件可靠性物理及其应用技术重点实验室,广东广州510610
出 处:《华南理工大学学报(自然科学版)》2020年第12期63-71,共9页Journal of South China University of Technology(Natural Science Edition)
基 金:广州市科技计划项目(201907010041);广东省重点领域研发计划项目(2019B010145001)。
摘 要:倒装芯片封装是高性能器件的一种重要封装形式,其独特的封装形式为电路修改带来了新的挑战。文中结合芯片背面减薄技术、基于聚焦离子束(FIB)的深宽广沟槽刻蚀技术、基于动态光栅衍射条纹的沟槽刻蚀终点监测技术、FIB电路修改技术,提出了一种倒装芯片/多层互连结构封装集成电路的电路修改方法。该方法首先利用全局抛光减薄法将倒装芯片减薄到70μm左右,再利用深宽广沟槽刻蚀技术及基于动态光栅衍射条纹的沟槽刻蚀终点监测技术进行深宽广的Si沟槽刻蚀,将芯片进一步减薄到约4μm,之后利用聚焦离子束电路修改技术进行电路修改。对6层金属CMOS芯片中M1金属开路的成功修改结果表明,文中所提出的倒装芯片/多层互连结构封装集成电路的电路修改方法,可以有效地实现倒装芯片/多层互连结构封装集成电路中开路或者短路的电路修改。Flip-Chip packaging is an important packaging form for high-performance devices.Its unique packaging form brings new challenges to circuit-edit(CE).A CE method for ICs of flip-chip/multilayer interconnected structure was proposed in this paper by combining the techniques of thinning the back of the chip,deep and wide trench etching technology based on Focused Ion Beam(FIB),trench etching endpoint monitoring based on dynamic gra-ting diffraction fringes,and FIB circuit modification.Firstly,this method uses a global polishing thinning method to reduce the thickness of the flip-chip to about 70μm.Then uses deep and wide trench etching technique and dynamic grating diffraction fringe-based trench etching endpoint monitoring technique to perform deep and wide Si trench etching.The chip is further thinned to about 4μm,and then the circuit is edited with a FIB CE technique.The successful CE results of the M1 metal open circuit in a 6-layer metal CMOS chip show that the proposed method can effectively accomplish the modification of open or short circuit in flip-chip/multilayer interconnected structured ICs.
关 键 词:倒装芯片 封装 多层互连结构 聚焦离子束 电路修改
分 类 号:TN432.8[电子电信—微电子学与固体电子学]
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