一种基于国产嵌入式CPU核的BP神经网络SoC设计  

Design of a BP neural network SoC based on domestic embedded CPU

作　　者：徐文亮 Xu Wenliang(School of Electronic Information,Hangzhou Dianzi University,Hangzhou 310018,China)

机构地区：[1]杭州电子科技大学电子信息学院,浙江杭州310018

出　　处：《电子技术应用》2021年第4期63-66,共4页Application of Electronic Technique

摘　　要：基于国产嵌入式CPU核CK803S及其SoC设计平台,设计一款BP神经网络SoC。给出了SoC的设计结构及BP神经网络硬件加速器的设计方案,针对BP神经网络硬件加速器中非线性的Sigmod和Guass激活函数,选择了一种既不影响速度又节约资源的方法来实现,并对其性能、功耗进行优化。验证结果表明,设计满足要求。The paper designs a Back Propagation(BP)neural network system on chip(SoC)based on the domestic embedded Central Processing Unit(CPU)CK803S and its SoC design platform.The design structure of SoC and the design scheme of BP neural network hardware accelerator are given,and for the non-linear BP activation functions Sigmod and Guass,a method that can save hardware resources while not affect the speed is selected to implement them,and optimize accelerator′s performance and power consumption.The verification results show that the design can meet the requirements.

关 键 词：BP神经网络 国产嵌入式处理器CK803S SoC设计平台 FPGA实现 

分 类 号：TN47[电子电信—微电子学与固体电子学] TN492