Trigger mechanism of PDSOI NMOS devices for ESD protection operating under elevated temperatures  

作　　者：Jia-Xin Wang Xiao-Jing Li Fa-Zhan Zhao Chuan-Bin Zeng Duo-Li Li Lin-Chun Gao Jiang-Jiang Li Bo Li Zheng-Sheng Han Jia-Jun Luo 王加鑫;李晓静;赵发展;曾传滨;李多力;高林春;李江江;李博;韩郑生;罗家俊(Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China;Key Laboratory of Science and Technology on Silicon Devices,Chinese Academy of Sciences,Beijing 100029,China;University of Chinese Academy of Sciences,Beijing 100029,China)

机构地区：[1]Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China [2]Key Laboratory of Science and Technology on Silicon Devices,Chinese Academy of Sciences,Beijing 100029,China [3]University of Chinese Academy of Sciences,Beijing 100029,China

出　　处：《Chinese Physics B》2021年第7期613-618,共6页中国物理B（英文版）

基　　金：the National Natural Science Foundation of China(Grant No.61804168)。

摘　　要：Trigger characteristics of electrostatic discharge(ESD)protecting devices operating under various ambient temperatures ranging from 30℃to 195℃are investigated.The studied ESD protecting devices are the H-gate NMOS transistors fabricated with a 0.18-μm partially depleted silicon-on-insulator(PDSOI)technology.The measurements are conducted by using a transmission line pulse(TLP)test system.The different temperature-dependent trigger characteristics of groundedgate(GGNMOS)mode and the gate-triggered(GTNMOS)mode are analyzed in detail.The underlying physical mechanisms related to the effect of temperature on the first breakdown voltage V_(T1)investigated through the assist of technology computer-aided design(TCAD)simulation.

关 键 词：ESD trigger voltage TEMPERATURE GGNMOS GTNMOS TCAD 

分 类 号：TN386.1[电子电信—物理电子学]