Characterization of HfSiAlON/MoAlN PMOSFETs Fabricated by Using a Novel Gate-Last Process  

作　　者：XU Gao-Bo XU Qiu-Xia YIN Hua-Xiang ZHOU Hua-Jie YANG Tao NIU Jie-Bin HE Xiao-Bin MENG Ling-Kuan YU Jia-Han LI Jun-Feng YAN Jiang ZHAO Chao CHEN Da-Peng 许高博;徐秋霞;殷华湘;周华杰;杨涛;牛洁斌;贺晓彬;孟令款;余嘉晗;李俊峰;闫江;赵超;陈大鹏(Key Laboratory of Microelectronics Devices&Integrated Technology,Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029)

机构地区：[1]Key Laboratory of Microelectronics Devices&Integrated Technology,Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029

出　　处：《Chinese Physics Letters》2013年第8期156-159,共4页中国物理快报（英文版）

基　　金：Supported by the Beijing Natural Science Foundation under Grant No 4123106;the Important National Science&Technology Specific Projects of China under Grant No 2009ZX02035.

摘　　要：We fabricate p-channel metal-oxide-semiconductor-field-effect-transistors(PMOSFETs)with a HfSiAlON/MoAlN gate stack using a novel and practical gate-last process.In the process,SiO_(2)/poly-Si is adopted as the dummy gate stack and replaced by an HfSiAlON/MoAlN gate stack after source/drain formation.Because of the high-k/metal-gate stack formation after the 1000℃source/drain ion-implant doping activation,the fabricated PMOSFET has good electrical characteristics.The device's saturation driving current is 2.71×10^(-4) A/μm(VGS=VDS=-1.5 V)and the off-state current is 2.78×10^(-9) A/μm.The subthreshold slope of 105 mV/dec(VDS=-1.5 V),drain induced barrier lowering of 80 mV/V and Vth of -0.3 V are obtained.The research indicates that the present PMOSFET could be a solution for high performance PMOSFET applications.

关 键 词：DRAIN PMOSFETS PMOSFET 

分 类 号：TN3[电子电信—物理电子学]